Accurate Time-Domain Simulation of Continuous-Time Sigma–Delta Modulators

International audienceIn this paper we present a methodology for the simulation of continuous-time sigma-delta converters. This method, based on a fixed-step algorithm, permits not only a time-domain simulation of the modulator output but also the simulation of intermediary signals. The method is based on the discretization of the continuous-time models and the use of a discrete simulator such as Simulink, which is more efficient than an analog simulator. By using filters with a sampling frequency higher than the modulator output frequency, the model can simulate input signals with a bandwidth which is higher than half the modulator sampling frequency. The transformation is exact in terms of Noise Transfer Function and asymptotically exact in terms of Signal Transfer Function (the Transfer Function from the modulator input to each stage filter output rapidly tends to the continuous-time model transfer function when the number of steps increases)

A High-Level Modeling Framework for the Design and Optimization of Complex CT Functions

International audienceNovel CMOS technologies are rapidly migrating towards the nanometer world. The design and optimization of complex analog circuits employing these processes is impracticable when using only transistor-level electronic design automation (EDA) tools. Efficient design methodologies including behavioral modeling are inevitable, but the high-level models should incorporate accurate circuit characteristics and technological limitations. One solution consists in using a refined top-down design process where the macro-models are extracted from the analog block elements (e.g. amplifiers, filters) implemented on specific technologies. These fast-simulating models can be used for the high-level simulation and optimization of the entire system. We propose in this paper a complete design methodology employing the above elements and the corresponding application framework based on the interface between MATLAB and CADENCE software tools. SIMULINK and VHDL-AMS are used for the high-level system modeling. A continuous-time (CT) Sigma-Delta modulator application is presented

A New Method to Synthesize and Optimize Band-Pass Delta-Sigma Modulators for Parallel Converters

An analysis and synthesis method for continuoustime (CT) band-pass delta-sigma modulators, applicable in parallel converters is presented in this paper. This method makes the design of band-pass delta-sigma modulators possible in a wide range of central frequencies and high DAC+ADC delays. This method is also applicable for narrow-band deltasigma converters in order to improve their performances

A Sigma-Delta Converter with Adjustable Tradeoff between Resolution and Consumption

International audienceThis paper proposes an analog-to-digital converter with two working modes. In the first mode, the system is a sigma-delta passive converter: the analog modulator uses a passive switched-capacitor low-pass filter and the only active element is the comparator. The consumption is low and the resolution is moderate (9 bits). In the second mode, the expected resolution is 15 bits. For that, the passive sigma-delta modulator is put in a loop with a low-pass amplifier and some digital processing elements. The principle of this two-mode system is validated by functional simulations and by the test of a circuit realized in a 0.35μm CMOS technology

Fixed-step Simulation of Continuous-Time sigma-delta Modulators

International audienceA methodology for the simulation of continuous time sigma-delta (ΣΔ) converters is presented in this paper. This method permits the simulation of ΣΔ modulators employing continuous-time filters using a fixed-step algorithm. The analysis method is based on the discretization of a continuous-time model and using a discrete simulator, which is more efficient than an analog simulator. In our analysis approach, each samplingperiod is divided into a fixed number of steps. This transformation is exact in term of Noise Transfer Function and asymptotically exact in term of Signal Transfer Function (the Signal Transfer Function of the model rapidly tends to the continuous time model transfer function when the number of steps increases). Moreover, the ideal step-size can be estimated from the bandwidth of the input signal

Novel loop architectures for enhancing linearity and resolution of analog-to-digital converters

This paper proposes three mixed (analog and digital) loop architectures which involve an analog-to-digital converter and enhance its linearity and its resolution. Their benefits are discussed with mathematical models and high-level simulations (the ADC inserted in the loops is then a passive sigma-delta structure). One of the loop topologies is particularly highlighted: it is ideally able to enhance resolution by 5 bits without damaging bandwidth. The only added analog element is an active differential low-pass filter. The other operators are fully digital: a predictor and some models of the analog parts. The effect of some defaults, such as mismatch and common mode, is illustrated by high-level simulations. The needed accuracy for the digital parameters is evaluated to 16 bits. The test of a prototype realized in a 0.358m CMOS technology validates the principle and demonstrates that the critical element of the structure is the active differential filter

Design of Electronic Control Circuit of Piezo-Electric Resonators for sigma delta Modulator Loop in AMS Bi-CMOS 0.35μm

Most of the recent design methodologies of continuous-time sigma-delta modulators use piezo-electric resonators as loop filters. Compared with classical resonators (Gm-c,Gm-LC and etc), piezo-electric resonators have the advantage of high quality factor and accurate resonance frequency. However, they suffer from anti-resonance frequency and impedance adaptation issues with connected electronic circuits. Therefore, their performance is in practice deteriorated. Compatible electronic control circuit is required to achieve expected performance. In this study, the specifications of the electronic control circuit are studied and this circuit is designed in AMS Bi-CMOS 0.35μm technology. the simulations are done at layout-level

Un convertisseur sigma-delta passif-actif bi-modes

National audienceCet article présente un convertisseur analogique-numérique possédant deux modes de fonctionnement. Le premier mode se caractérise par une très faible consommation, associée à une faible résolution (9 bits). Dans le second mode, la résolution est accrue de 6 bits en théorie ; en contrepartie, la consommation augmente. En mode « faible consommation », le système est un convertisseur sigma-delta passif c'est-à-dire dont le modulateur utilise un filtre passe-bas passif, le seul élément actif étant le comparateur. En mode « haute résolution », le modulateur passif est positionné dans une boucle comprenant notamment un filtre passe-bas actif. Le principe de cette topologie bi-modes a été validé par des simulations au niveau fonctionnel et par le test d'un circuit prototype réalisé en technologie CMOS 0.350m

BANDPASS / WIDEBAND ADC ARCHITECTURE USING PARALLEL DELTA SIGMA MODULATORS

International audienceThis paper presents a new method for digitizing wideband signals. It is based on the use of parallel analog delta sigma modulators, where each modulator converts a part of the input signal band. A major benefit of the architecture is that it widens the conversion band of the input signal and increases its dynamic range. Two solutions are proposed to reconstruct the signal: the first one uses bandpass filters without demodulation and the second demodulates the signal of each modulator, and then processes it in a lowpass filter. This paper focuses essentially on the digital part of the system and the overall performances are compared by using simulation results

Optimization of the Noise Transfer Function of Extended-Frequency-Band-Decomposition sigma-delta A/D converters

International audienceFrequency-Band-Decomposition (FBD) is a good candidate to increase the bandwidths of ADC converters based on sigma-delta modulators. Each modulator processes a part of the input signal band and is followed by a digital filter. In the case of large mismatches in the analog modulators, a new solution, called Extended Frequency-Band-Decomposition (EFBD) can be used. This solution allows for, for example, a four percent error in the central frequencies without significant degradation in the performance when the digital processing part is appeared to the analog modulators. A calibration of the digital part is thus required to reach these theoretical performance. This paper will focus on a self-calibration algorithm for an EFBD. The algorithm helps minimize the quantization noise of the EFBD